Description
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Description

ELEC 451 is concerned with digital integrated circuits that have considerable and undeniable importance for electrical and computer engineering. The remarkable pace of development for microelectronics fabrication technology for transistor elements has enabled significant gains in operational performance and integration of functionality for digital integrated circuits, as well as reductions in power consumption. The clear majority of digital integrated circuits are implemented using CMOS technology. Therefore, ELEC 451 is focused exclusively on this particular technology. ELEC 451 has several important aspects, including MOSFET theory and modelling for digital integrated circuits, CMOS fabrication process considerations, static and dynamic CMOS digital circuits for combinational and sequential logic, the physical realization of circuits in the context of the CMOS fabrication process, clocking considerations, memory structures, the use of simulation software for circuit engineering, and the use of layout software for physical circuit specification. The knowledge gained through ELEC 451 allows for a deeper technical appreciation of the design and implementation of processor and memory chips for general-purpose and embedded computing, programmable logic chips, and application-specific integrated chips. ELEC 451 builds on the technical background of courses such as ELEC 252 and ELEC 271, and it complements the hardware-oriented material covered in other courses such as ELEC 274 and ELEC 371.

Course Learning Outcomes (CLOs)
  • Describe the steps of typical integrated-circuit fabrication processes to form NMOS/PMOS transistors and interconnections using polysilicon and metal.
  • Describe robust CMOS circuit implementation of flip-flop behavior and relevant considerations for clock signals to ensure reliable operation.
  • Describe cell, sense-amplifier, and address-decoding circuits for implementation of CMOS-based memory arrays.
  • Design static and dynamic CMOS circuits in schematic representation to implement combinational logic functions.
  • Develop suitable standard-cell physical layouts for schematic CMOS circuit representations.
  • Characterize parasitic and load capacitances for CMOS circuits, and use such characterizations to estimate delays for switching behaviors and to estimate power consumption.
  • Develop familiarity with software tools for circuit simulation and physical layout, as well as the role of technology design rules.
Credit Breakdown

Lecture: 3
Lab: 0.25
Tutorial: 0

Academic Unit Breakdown

Mathematics 0
Natural Sciences 0
Complementary Studies 0
Engineering Science 21
Engineering Design 18