The Computer Architecture group is actively engaged in cutting-edge research that ranges from low-power VLSI architectures to high-performance parallel computing systems. Research areas include low-power design and thermal analysis, architecture design for nanotechnologies, system-on-chip (SoC) design, testing and fault-tolerance for VLSI structures, and power-aware and high-performance computing (HPC) systems. The researchers maintain the Computer Architecture Laboratory that is equipped with design workstations, SoC prototyping platforms, and testing equipment, and the Parallel Processing Research Laboratory that has clustered computers with high-performance interconnects.

To address chip power densities and peak temperatures, researchers in the Computer Architecture group in collaboration researchers at Northwestern University, have developed a comprehensive IC chip-package thermal analysis software package based on novel, adaptive, numerical analysis methods. Researchers are also active in designing architectures for nanotechnologies.

On SoC design, research is primarily concerned with the challenges of designing, implementing, and testing single-chip multiprocessor systems, with an emphasis on supporting adaptations for application-specific uses. This work emphasizes the realization of concepts through prototype implementation with the aid of new and effective software tools that enhance productivity while complementing existing computer-aided design software.

On HPC systems, researchers in the Computer Architecture group are involved in tackling two important design constraints in such systems: performance and power consumption. In collaboration with NetEffect Inc., researchers have designed and developed efficient mechanisms for high-performance communication subsystems in clusters. Researchers have also proposed power-aware algorithms and runtime systems for HPC systems.

The research carried out by the Computer Architecture group is at the leading edge in Canada and comparable to the best internationally. The group receives its funding from the Natural Sciences and Engineering Research Council of Canada (NSERC), Canada Foundation for Innovation (CFI), Ontario Innovation Trust (OIT), Ontario Centres of Excellence (OCE), Communications and Information Technology Ontario (CITO), Queen's University, Semiconductor Research Corporation, Altera Corp., Sun Microsystems, Inc., Tensilica, Inc., and NetEffect, Inc.

A. Afsahi (Group Coordinator)

• Parallel computer architectures
• Network-based high-performance computing
• Communication latency hiding and speculation techniques
• Network interfaces and user-level messaging
• Interconnection networks and Collective communications algorithms
• Benchmarking and performance evaluation
• Parallel Processing Research Laboratory

N. Manjikian

• Parallel processing
• Multiprocessor architectures and applications
• Processor-memory integration for system-on-chip design
• Computer Architecture Laboratory

S.J. Simmons

• Testable, reliable VLSI architectures
• System-on-chip
• Fault-tolerant structures
• Low-power architectures
• Architectures for encryption/decryption