Computer Architecture Laboratory
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Computer Architecture Laboratory

Department of Electrical and Computer Engineering
Queen's University, Kingston, Ontario

Personnel | Alumni | Facilities | Software | Support

 

 

Faculty Members

  • Dr. Naraig Manjikian

    Research areas: single-chip multiprocessor architectures and applications, on-chip interconnection networks, embedded memory organization, software tools for system integration, prototype implementation in programmable logic.

  • Dr. Li Shang

    Research areas: high-performance network-on-chip architectures, power/thermal analysis and optimization, embedded system design and synthesis, computer-aided design.

  • Dr. Subramania Sudharsanan

    Research areas: multimedia processing, modeling and analysis of multi-threaded processors, system-on-chip designs for high-performance multimedia computing, heterogenous multimedia architectures.

  • Dr. V. Carl Hamacher

    Research areas: interconnection networks for multiprocessors and multicomputers.

 

 

Current Graduate Students

 

Some of the graduate students in the Computer Architecture Laboratory

 

 

 

  • Ronny Pau (supervised by Dr. N. Manjikian)
  • Ahmad Khayyat

  • Jonathan Roth (supervised by Dr. N. Manjikian and Dr. S. Sudharsanan)
  • Changyun Zhu (supervised by Dr. L. Shang)
  • Yonghong Yang
  • Nicolas Allec
  • Zyad Hassan
  • Assem Bsoul

 

 

Graduate Alumni and Theses

Beginning in mid-2007, Queen's University has provided an on-line repository for all graduate theses. Those theses in the list below that are found in the on-line repository have links in the titles for access to the electronic documents.

  • Nicholas Ma, M.Sc.(Eng.), 2007, Modeling and Evaluation of Multi-Core Multithreaded Processor Architectures in SystemC, supervised by Dr. S. Sudharsanan and Dr. N. Manjikian

  • Edmond Coté, M.Sc.(Eng.), 2007, Implementation of Coarse-Grain Coherence Tracking in Ring-Based Multiprocessors, supervised by Dr. N. Manjikian

  • Shuthakini Anugithan, M.Sc.(Eng.), 2007, Architectural Enhancements for SIMD-Style Multimedia Processing in General-Purpose Processors, supervised by Dr. S. Sudharsanan, Dr. V. C. Hamacher, and Dr. N. Manjikian

  • Stephen Warrington, M.Sc.(Eng.), 2006, High Throughput Architectures for Variable Block Size Motion Estimation, supervised by Dr. G. Chan and Dr. S. Sudharsanan

  • Mohanarajah Sinnathamby, M.Sc.(Eng.), 2005, Architectural Enhancements for General-Purpose Processors and Memory Interfaces to Improve Performance for Video Applications, supervised by Dr. N. Manjikian

  • James Reed, M.Sc.(Eng.), 2004, A Protoype Implementation of a Split-Transaction Bus with Enhance Arbitration for System-on-Chip Multiprocessors,supervised by Dr. N. Manjikian

 

 

Past Research Assistants

  • Adam Cohen (Summer 2004, supervised by Dr. S. Sudharsanan)
  • Nathan Cordeiro (Summer 2003 and Summer 2004, supervised by Dr. N. Manjikian)
  • Colin Doutre (Summer 2004 and Summer 2005, supervised by Dr. N. Manjikian)
  • Cindy Mark (Summer 2005, supervised by Dr. N. Manjikian)
  • Jonathan Roth (Summer 2006, supervised by Dr. N. Manjikian)

 

 

Laboratory Facilities

  • Computing Equipment: The research in the laboratory is supported by a Sun Blade 2000 server and two Sun Fire multiprocessor servers, several Sun Ultra workstations, a 8-node Linux cluster with a mixture of dual- and quad-core processors, and a number of other desktop PC computers for general/technical usage. These computers support architectural simulation software, development tools for application software, commercial computer-aided design tools for programmable logic chips and custom VLSI chips, and various other examples of research software.

 

Sun Blade 2000 server to support software for custom chip design
Front panel of Sun multiprocessor showing hot-swappable disk drives Inside of Sun multiprocessor showing 4 processor/memory modules
Part of the Linux cluster consisting of dual/quad-core processor platforms

 



  • Computer-Aided Design Tools: Researchers in the laboratory have access to commercial CAD tools from vendors such as Synopsys, Mentor, Cadence, Avanti, Altera, and Xilinx in order to design and simulate systems for programmable logic chips or custom VLSI implementation. Access to these tools is provided by CMC Microsystems for education and research.

 

Floorplan of internal logic chip utilization for a prototype multiprocessor system Waveforms from simulation of prototype multiprocessor system


  • Prototyping Hardware: Researchers in the laboratory can generate prototype implementations of architectures that are under investigation. The equipment available in the laboratory to support these efforts includes hardware prototyping equipment that has been provided by CMC Microsystems as part of its System-on-Chip Research Network initiative. Prototyping stations based on high-capacity programmable logic chips are available with the capability of combining arbitrary user-defined custom logic with vendor-supplied logic components. One station is based on a Xilinx multimedia application development board that includes video and audio input/output capabilities. Two other stations are based on Altera development boards for embedded systems and digital signal processing. Finally, there is an additional prototyping station using an Amirix AP1000 development board with a Xilinx programmable logic chip. Each prototyping station has a dedicated desktop PC computer with the necessary software tools for logic design and simulation, application software development, and programming of logic chips.

 

A prototyping board with a programmable logic chip, memory chips, and other supporting electronics A high-capacity Altera chip with 80,000 logic elements
The full board containing the large 80,000-element programmable logic chip

 



  • Test Instruments: For hardware prototyping, researchers can rely on the capabilities provided by vendors of programmable logic chips to embed logic analysis functionality with the system under test in the same chip in order to capture and display waveforms. In addition, stand-alone Tektronix logic analyzers of the Department of Electrical and Computer Engineering are also available for observation and verification of low-level system behavior.

 

Tektronix logic analyzer displaying waveforms of prototype hardware operation

 

Software

  • Multiprocessor enhancements of the SimpleScalar simulator

    SimpleScalar is a popular simulation tool in architectural research. To support the activities of the Computer Architecture Laboratory at Queen's University, the original uniprocessor software has been enhanced by Dr. N. Manjikian in order to provide functional and cache simulation capabilities for multiprocessing, including dynamic visualization of cache coherence as the execution of a parallel program is simulated. These multiprocessor simulator enhancements were released to the research community in 2000, with users throughout North America, Europe, and Asia.

  • ISAC: Adaptive chip-package thermal analysis package

     ISAC is a tool that is intended to both steady-state and dynamic thermal analysis to support synthesis of integrated systems for computer archiecture research. The software provides rapid and accurate results. It has been produced as a collaboration involving Dr. Robert Dick and Zhenyu Gu at Northwestern University, and Dr. Li Shang, Yonghong Yang, and Changyun Zhu at Queen's University. The software was released to the research community in 2007.

 

 

Research Support

Support for the research efforts in the Computer Architecture Laboratory has been provided by: